Oct 16, 2026, 7:41 AMNot sure if it exists, but I'm looking for an FPGA with on-chip MCU with support in an open-source toolchain. Mostly for trying FPGA programming again. Ideally something like an ICE40 with a RISC-V micro in one chip.
At my old job I really enjoyed working with the Altera SoCs, having custom peripherals in the FPGA, but still being able to write normal software to process the data was really nice.
But if I don't want to open Quartus or Vivado again...
Oct 16, 2026, 7:56 AM@Mecrisp mmh yeah I guess a soft-core is an option. Maybe it has gotten better since the NIOS days in terms of toolchain. But having a full MCU with flash, RAM, DMA, USB, etc. feels a bit more comfortable
@tamme We were busy improving things :-)
RISC-V Playground on Lattice UP5K should be a nice start:
https://badge.team/docs/badges/mch2022/software-development/risc-v/
Tiny variant for Lattice HX1K: https://codeberg.org/Mecrisp/Nandland-RISC-V
And a very large implementation, featuring XIP from SPI Flash, SDRAM, and USB-CDC terminal for ULX3S (Lattice ECP5) is included in the Mecrisp-Quintus package you get at https://mecrisp.sourceforge.net/
Beyond that, there is an open source SoC builder called LiteX https://github.com/enjoy-digital/litex
@tamme Let me know what "order of magnitude" in resources you have in mind.
Oct 17, 2026, 2:35 PM@Mecrisp I would like to have at least 16KB of RAM and Flash, though I guess PSRAM would be fine. I would assume block RAM is most limiting for soft cores?
@tamme Block RAM often is a limiting factor indeed, but your requirements are absolutely reasonable. The Lattice iCE40 UP5K, for example, comes with 15 kb of initialised block RAM with one read and one write port, 128 kb single port uninitialised RAM which is fine as RAM for a RISC-V softcore, and you can use the space beyond the bitstream in the SPI flash for your own code.
@tamme It is possible to do execute-in-place directly from the SPI flash for booting and loading your code into the large uninitialised RAM blocks.
All of the Lattice ECP5 chips offer much more.
@tamme I usually recommend either the Icebreaker or the Radiona ULX3S boards, which both have excellent open source support, and example FemtoRV "phantasy microcontroller" implementations in Mecrisp-Quintus:
https://1bitsquared.de/products/icebreaker
(Lattice UP5K)
https://radiona.org/ulx3s/
(Lattice ECP5)
Toolchain:
https://github.com/YosysHQ/oss-cad-suite-build/releases/
Oct 17, 2026, 7:53 PM@Mecrisp oh cool, maybe I dismissed soft-cores to early. I'll give it a look, the ECP5 seems to be quite powerful and available on boards. Thanks for all the info!
@tamme these are interesting https://vicharak-in.github.io/shrike/
https://github.com/Keyaan-07/Arctyx-Nano https://www.quicklogic.com/devices/fpga/open-source-tools/ (although the MCU there is ARM)
https://github.com/openhwfoundation/core-v-mcu-devkit
I don't have any of these boards, so can't say how well they work.
@tamme I haven't used them, but if you are looking for devkits with a fully open toolchain, I think the EOS S3 family could be an option (ARM Cortex M4F + eFPGA).
There are small-form boards like Qomu (https://tomu.im/qomu.html) or larger ones like QuickFeather (https://www.quicklogic.com/devices/quickfeather-lite-development-kit/).
Oct 17, 2026, 2:36 PM@lucab oh that chip looks like what I want! Thanks
Oct 16, 2026, 8:57 PM@tamme Zynq XC7Z010 might be an option. They’ve become really cheap these days, and while they have chonky application CPUs intended to run Linux, nothing stops you from just skipping that, disabling caches, and running your own code single-threaded on the bare metal on one of these. The FPGA part of these AFAIK doesn’t have a nice open source toolchain yet, but the CPU bit is just gcc, llvm or another arm compiler of your choice.
Oct 16, 2026, 8:59 PM@tamme You might also enjoy the work @azonenberg did hooking up an FPGA to a slightly chonky ST microcontroller through one of its external memory interfaces. It’s a separate chip, but it’s an approach that allows you to choose a size-appropriate FPGA that has an open source toolchain.
Oct 17, 2026, 2:44 PM@jaseg @azonenberg whoa, that looks like a cool solution. I got to find some time to read the article in full, but it seams to be abest of both worlds combination. Setting up the hardware could be a bit annoying, but I really like it! Thanks for pointing me to it
For future reference, here is the article: https://serd.es/2024/07/24/Memory-mapping-an-FPGA-from-a-STM32.html
@tamme @jaseg On the higher end, there is also the STM32MP2 which has PCIe that I am exploring as a lower pin count, higher performance alternative.
It's meant to run embedded Linux but I've successfully brought it up bare-metal with no OS in a few kB of firmware. No uboot, no linux, no RTOS, just raw register pokes.