@JustinDerrick @dijumx @whitequark @0xabad1dea the variant I read about maybe a decade ago was one where the FPGA layout had loops, not connected to the input or the output, but breaking the loop would make it fail. IIRC the authors suspected it was relying on some weak analog interference but confirming that was out of scope. I don’t think the evolving algorithm is a nasal demon tho, because it isn’t intended to find reusable results