Hi #OpenHardware & #Electronics #Networking et al folks, my friend Seth and I have embarked on a ethernet hardware project (hopefully to become a router). For now we're just experimenting with an ethernet PHY to get used to it and to that end we've made a little PHY "breakout" board for the the GPY111 PHY chip by MaxLinear.

However we've been having trouble getting the PHY to talk to us properly. We've tried turning on the Far End Test Loop which should bounce anything coming in over the eth cable back out the cable but we get no Transmitted data from the PHY over the cable. We also tried a hard-wired RGMII loop-back which did nothing. The GPY111 can at least transmit test packets. Is there anyone with experience with this chip that could help?

The intention is to route RGMII from the PHY into the connector (2nd pic, on the right of the board) (https://syzygyfpga.io/) to mate with the BeagleV-fire which has an FPGA. The idea is we would talk to our PHY over the BeagleV to send and receive data.