I'm looking for a Dataman S4 GAL module ( adapter to program PAL/GAL on the S4 ). It's not a simple wiring adapter it has some logic in it but pictures I have are too low res to build a replica from ...
If you have one or know someone that might, please reach out. Thanks !
Just for fun I've been sort of abusing the differential receiver ( clk + data + deserializer ) project that I had in TT08. It occured to me it should work fine for MIPI-CSI. So I wired a RPi v1 camera to it, and capture the deserialized output with a logic analyzer and I can extract image data out of it 🎉
The RPi camera is 2 lanes and I can only capture one, so I'm missing half the data and there are a lot of hacks to compensate for that but ... it's possible to RX MIPI in #tinytapeout !
I need help from the #fediverse to figure out how to configure an OV5647 sensor to output on a single MIPI lane.
The leaked datasheet I have is ... basically useless. The description of the registers doesn't match reality. There are several bits in there related to mipi lanes, none of them act as one expect and the default value of the register doesn't even make sense if you relate it to the datasheet.
So if anyone has a working config, or a contact at omnivision they could ask ...
🎉 New video showing off running PCI express over COTS SFP modules and associated complications along with future plans.
And then a small side quest involving optical splitters and #ngscopeclient
Definitely on the long side, sorry about that 😬 But I hope it's still interesting 🤞
🎉 Got the link working.
Still quite many bad DLLP / TLP looking at the couters, but good enough I can actually run a DMA test and can do 4.5 ~ 5 Gbps in both direction at the same time over a 2m fiber link.
Definitely more work and tweaking needed but it's good enough to convince me it's doable and invest more time/money in making a better setup. And also trying QSFP transceiver.
( My goal is 4x Gen3 over a 40G-LR4 using a single fiber pair ).
How does one debug a PCIe gen 3 link SI issue (probably) without any test gear 😅
(Well without any gear that has nearly enough BW at least, I'm about 10x too slow ...)
Any PCIe expert out there ?
I'd like to skip phase 2&3 equalization when switching to Gen3. Root is a RPi5 and device is a xilinx fpga I control ...
If you're a swiss resident ( or know one ... ) you can get a custom hardware design onto an ASIC for FREE !!!
You get back one chip with your design (and a bunch of others!) and some board to help bring up/testing.
Also, this is "resident", no need to be a student or at uni or anything, you just need a valid Swiss address ...
I know I might be repeating myself here because I mentioned it a few month back but this bear repeating IMHO.
https://swisschips.ethz.ch/news-and-events/tiny-tapeout-submission-form.html
PS: Can I haz boost for reach ?
Is there something like lady heather (GPS monitor) but in a client / server architecture.
I like the sky view and OSC/PPS stat monitoring displays but I can't have a GUI connected all the time. What I'd like is some data collection running headless and be able to attach a monitor GUI when I want to see how things are/were.
Today I learned the rpi2 pico has a "header" version that's doesn't have castellated edge but instead a pre-soldered header pins ....
Any body got a good registrar that doesn't have a ton of overhead ?
I'm using GANDI but it's gotten insanely shitty and expensive ... like seriously 35 EUR for a .com ???
I was originally thinking hetzner but although they do .com I also have a .be and ideally a .app / .dev I'd like to host ...
I'll be going live in about 15 min, testing the IHP chips we just received !
Any Video4Linux / embedded video experts here ?
A company I used to contract for is looking to capture low latency video on Orange Pi 5 Plus, getting the image line by line rather than waiting for full frame.
If you think you can help, have experience with that can of stuff and looking for contracting job, you can ping me.
Anyone know a design of a good DC UPS ?
My ideal one would be USB-PD input, LiFePO4 batteries and 12V output at 3A.
Just enough to power the router, ONT and a media converter ...
@aislerhq I'm wondering if you have any way to deal with raw dies in your PCBA service ?
(thinking about wafer.space which will ship back raw dies I'd need some way to deal with)
Has anyone tried to make Hazard 3 in sky130 ? (cc @wren6991 )
I'm wondering what logic size would be ( excluding sram for register file ) ...
So I just learned, if you're a swiss resident you can actually get a tapeout on tinytapeout completely for free :
Deadline is Sep 1st so it's a bit short notice, but still doable for small projects.
So if you're a Switzerland resident, check it out ! (And maybe RT for reach ?)
My experiment trying to run a Voodoo2 on a Raspberry Pi 5 ...
Still plenty of unanswered questions, so if any of you are ARM64 or PCIe experts, please chime in 😁
A week or so ago I had this crazy idea that I could make a "copy" of the 6502 at the transistor level, but using a process with and open PDK.
Below is a pre-layout sim where I replicated the visual6502 extracted chip using GF180 PDK. Transistor are mapped 1:1 (depletion nmos replaced with pmos for pullups).
Test software is https://github.com/trebonian/visual6502/blob/master/testprogram.js
And you can see it fetching instruction, jumping and writing return address, then incrementing 0x10 (including double store) and then return.
Are the design files (PCB / schematics) for the Monster 6502 available somewhere ? Am I being blind for not finding them ?