I continued my experiments on Mecrisp-Ternary, a balanced #ternary processor for #FPGA including a custom #Forth implementation, by exploring cooperative multitasking and interrupts on this special architecture. Ideas for balanced ternary gray code are included, too! For the curious : >gray ( n -- x ) dup 1 rshift not 3sum ;
The FPGA implementation is released now.
I am happy to announce Mecrisp-Ternary, an experiment to implement the #Forth programming language on a custom balanced #ternary architecture with variable width. Instruction set emulator is included, #FPGA implementation is coming soon: https://codeberg.org/Mecrisp/mecrisp-ternary
The onboarding on Mastodon is a calm experience, because there is no algorithm to select content for you. You exactly get what you follow.
For your growing collection of crazy and fun IO peripherals, lets add this:
https://github.com/badgeteam/mch2022-firmware-ice40/blob/master/projects/Ledcomm/rtl/ledcommflow.v
https://github.com/badgeteam/mch2022-firmware-ice40/tree/master/projects/Ledcomm
Its a drop-in UART replacement that uses a LED connected with both anode and cathode to GPIO pins as a bidirectional terminal connection, including link state indication and flow control.
I am happy to announce the FemtoMSP430, a processor designed with the instruction set of the classic #MSP430, but with a flexible bus interface similar to @BrunoLevy01 #FemtoRV32 including memory busy signaling. The playground contains a phantasy "microcontroller" design for the #ULX3S #FPGA board, interactively running the original #Mecrisp #Forth image for MSP430G2755, enhanced with a text mode on 800x600 video, USB-CDC terminal and a lot of GPIO wires: https://codeberg.org/Mecrisp/FemtoMSP430
We offer a position as #FPGA developer for software defined radio #SDR with JESD204B-ADCs, a mixture of #DSP algorithms in logic on Xilinx/AMD FPGAs and #GNURadio on #embedded Linux for our upcoming satellite project.
https://jobs.mb-satellite.com/HPv3.Jobs/MB-Satellite/stellenangebot/46970
The lab is located in Hamburg, Germany, but most of the work can be done fully remote.
For details, contact Fabian Brücher fabian.bruecher@mb-satellite.com or @mbs_ho:matrix.org
I am happy to announce the release of a longwave software defined radio which I designed at work for experiments with #DSP algorithms, running on the #ULX3S #FPGA board. The user interface is based on #Mecrisp #Forth running on the #FemtoRV, and the signal chain contains a pipelined FFT designed by Dan Gisselquist. Many thanks to Ulixxe for their USB-CDC implementation!
https://github.com/mb-sat/ulx3s-longwave-sdr
https://codeberg.org/Mecrisp/ulx3s-longwave-sdr
Many subtle differences between implementations! There is the ANS standard, but usually one encounters a mix&match of the personal taste. Try porting code, and likely be surprised. This aside...
Get your guns ready, dare to forget PAUSE in a task being in a cooperative multitasker.
Whereas Forth definitions, on a stack based language, are mostly reentrant, the use of mostly global variables in many strategically important places is not. Take care if you use interrupts.
I enjoyed a great #bladebabes concert at #38C3, where can I find this band in the net?
@Nievaris_Art I saw your little lion in the sketchbook at 38c3 and I love it!
Angekommen beim #38c3. Einfach Anstuppsen für einen Plausch in der Wirklichkeit.
Found an excellent walkthrough video https://www.youtube.com/watch?v=8boamDdvD8s for the FemtoRV32-Quark https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/RTL/PROCESSOR/femtorv32_quark.v code! @BrunoLevy01 and me did our very best to make the Verilog source of our RISC-V RV32I processor core readable, and this video explains all the tricks involved in a very nice style with drawings.
The space mission MAIUS-2 I wrote firmware for since 2019 launched in November 2023, and I am now open for new paid projects! My favourites are #Assembler, #Forth and #Verilog on #FPGA. I am the author of #Mecrisp, a family of optimising Forth compilers (Mecrisp-Ice went to space!), did processor design with @BrunoLevy01 (#FemtoRV Gracilis) and I love #sizecoding challenges (Byte-Athlon Champion in #Lovebyte 2023). Formally, I am Dr. rer. nat. in biophysics with experience in laser spectroscopy.
A sparkling frozen animated IFS fractal demo, released in Lovebyte 2024, using an analog oscilloscope in XY mode for vector graphics.
@marove Hallo Timo, ich hoffe dass Du gut wieder in der echten Welt und im neuen Jahr angekommen bist!
Hier kommt eine interessante Idee für ein Lochrastermuster, welches sowohl für bedrahtete Bauelemente als auch für SMD passt: https://github.com/electroniceel/protoboard/
